Introductory and preparatory knowledge
What is FPGA?
FPGA (Field-Programmable Gate Array) is a type ofIC(IC), whose hardware functions can be defined by user programming in the field. Unlike traditional ASICs (Application Specific Integrated Circuits), FPGAs are still manufactured after theCan be reconfigured as needed. As a result, they are widely used in scenarios that require flexibility and customizability with high performance requirements, such as communications, signal processing, autonomous driving, and the Internet of Things.
Key features of FPGAs include:
-
programmability: Users can use hardware description languages (HDL) such asVerilogor VHDL to write the FPGA's internallogical function, and synthesized, implemented and downloaded into FPGAs with tools.
-
parallel processing capability: FPGAs support highly parallel operations where multiple logic units can work independently at the same time, so they excel in applications that require high throughput, such as image processing or signal processing.
-
hardware acceleration: In some specific computing tasks, FPGAs can be used as gas pedals to achieve more efficient computing through hardware.
-
dexterity: FPGAs can be modified functionally on demand during the development phase or deployment phase without the need to redesign and remanufacture the chip as in the case of ASICs.
FPGAs are typically used in applications that require high performance, low latency and a high degree of flexibility and customizability, such as communication base stations, aerospace, industrial control, cryptographic processing, and so on.
What is Vivado?
Vivado is a suite of design tools developed by Xilinx for use withFPGAs and SoCs(System on Chip), etc.Design, synthesis, simulation and implementation of programmable logic devicesIt is designed for Xilinx FPGA and programmable SoC platforms such as the Zynq family. It is designed for Xilinx FPGA and programmable SoC platforms such as the Zynq family, and providesFull-flow support from design input to hardware realization。
Key features and functions of the Vivado tools include:
-
Synthesis: WillHardware Description Language (HDL) code(e.g., Verilog, VHDL) into gate-level circuits that can be implemented on FPGAs.Vivado provides highly efficient synthesizers that optimize the performance, area, and power consumption of a design.
-
Implementation: The synthesized design needs to go through mapping, layout routing, and other steps before it can be turned into a logic configuration that is actually ready to be used in an FPGA. vivado implements these processes with automated tools that provide detailed reports and optimization recommendations.
-
IP IntegrationVivado supports the integration of off-the-shelf IP cores, either from Xilinx or from third-party-developed function blocks, dramatically accelerating the development process.Vivado's IP Integrator allows designers to graphically integrate and connect multiple modules.
-
Simulation and Verification: Vivado provides simulation capabilities to help designers verify the correctness of logic functions before downloading the design to the FPGA. With simulation, designers can test the behavior of the design in a virtual environment, reducing errors and debugging time.
-
Debugging Tools: Hardware debugging tools, such as Vivado Logic Analyzer and Integrated Logic Analyzer (ILA), are integrated into Vivado to help designers monitor the status of internal signals in real time as they run code on FPGAs, making it easier to find and fix problems.
-
Efficient interface: Vivado provides a modern graphical user interface (GUI) that allows users to design by dragging, dropping, and connecting components, as well as supporting command line and scripting operations for different design needs.
Vivado is the core tool of the Xilinx FPGA development flow, supporting the entire flow from RTL (Register Transfer Level) design input to final configuration file generation, and is one of the indispensable development environments for FPGA design engineers.
environmental preparation
Vivado Download and Installation
downloading
Downloading is easier via Baidu.com, tutorials and links are available via this link:Win10 install vivado + vitis 2019.2 tutorial_vitis2019.2 installation tutorial - CSDN Blogs
Note that download links for other versions do not come with thevitis
, so it needs to be installed via the link above. The netbook goes directly to:
Vivado 19.2 installation package: link:/s/1fPlNDzpC0EPXMhOloDyzfA
Extraction code: 1234
Installation Tutorial
- Reference e-book: TheFPGA Development Guide for Da Vinci Pro》Chapter 4 p110, visit the link:
Files shared via Netflix: FPGA Developer's Guide V1.
Link./s/1Zqfn0Vq5Kqbzhe6X5WwMyA?pwd=5y97 carry (hanging down from the hand)
Code: 5y97
- Also see this blog directly [more complete】:The most detailed hands-on guide to installing Vivado 2019.2
Need to add that the options are important here (the book doesn't say that and there are no pictures involved)!!!! Choose vitis,I checked, you choose vitis is equivalent to choose the whole family bucket, including vitis + vivado, if you choose the following vivado option, then there is no vitis IDE. you can not do PS side development.
Broken Certificates
See this article for a detailed tutorial:The most detailed hands-on guide to installing Vivado 2019.2
- The license management software opens automatically after the installation is complete, click the
Load License
ClickCopy License
To do this, locate the license file in the resource kit and click on theshow (a ticket)
- You can also open the license management software again as shown in the following figure and select the license that you have acquired
license
VScode Configuration
See the tutorial:
-
Vivado and Vscode programming environment setup_vivado associated vscode-CSDN blog
-
VSCode configuration verilog environment (code hints + automatic example + formatting)_vscode verilog-CSDN blog
Vivado Software Tutorials
See the tutorial:
- 03 Tools: Vivado software installation beili_bilibili
- 04 Use of Vivado Software (Lecture 1) bleep_bilibili
- 05Vivado Software Usage Lecture 2 beili_bilibili