BLOG-1
preamble
In completing Topic Sets 4, 5, and 6, we gradually deepened our understanding of programming logic design, object-oriented programming, and modular development. These three assignments progressed progressively from the complexity of data processing to the logical depth of physical system simulation.
Answer adjudication procedure-4:
With the core of multiple question types of scoring, new fill-in-the-blank and multiple choice questions, the program is required to support dynamic input parsing while taking into account the scenarios of question deletion and wrong question processing, which makes the code logic more complex.
Home Power Circuit Simulation Program-1:
Focusing on simulating the circuit logic of real-life household devices, the initial implementation of voltage transfer and device state simulation of switches, speed controllers and controlled devices (e.g., lights and fans) in series circuits.
Home Power Circuit Simulation Program-2:
Based on the previous version, the logic of parallel circuits has been added and the concept of device resistance has been introduced to further improve the accuracy and complexity of circuit simulation.
Through these three assignments, we have come to realize the importance of architectural design, and have gradually shifted from a more rudimentary implementation of functionality to a greater focus on code extensibility, modularity, and maintainability.
Design and Analysis
Procedures for answering and judging questions
1. System design
The core of the topic is to build a system that supports multi-question marking, involving functions such as input parsing, question management, answer sheet processing and error alerts. To achieve this goal, the code adopts a layered design, which encapsulates the modules of questions, test papers, students, and answer sheets independently to reduce the coupling of the system.
2. Core module analysis
QuestionQuestion
is an abstract base class with subclasses such asSingleChoiceQuestion
、MultipleChoiceQuestion
cap (a poem)FillInBlankQuestion
Separate implementations of the scoring logic for different question types.
Judgment Score Logic:
Single Choice: Exact Match Score.
Multiple Choice: Categorized as fully correct, partially correct, and incorrect, with half the marks awarded for partial correctness.
Fill in the blanks: score for a perfect match, half the points for a partial match.
TestPaper
Manage question paper information, including the list of questions and scores per question.
Calibrate the total score for compliance and output a warning message.
AnswerSheet class
Stores student answer information and associates it with question papers and questions.
The answer records are generated by traversing the questions in the test paper and calling the marking method of the question class one by one.
3. Static analysis
Lines of code: about 1000 lines.
Annotation coverage: 38%.
Complexity Analysis:
The adjudication logic is more complex, with more nested conditions, especially in the partially correct adjudication part of the multiple choice and fill-in-the-blank questions.
The input parsing module has a lot of duplicate code and can be further optimized.
- Core Logic Demonstration
This code implements the scoring logic for multiple choice questions and is the core method of the MultipleChoiceQuestion class:
Convert standard and student answers to Sets for quick comparison of answer sets.
Logical judgment:
Determine if the student's answer completely contains the standard answer (completely correct).
Determine if the student's answer contains additional incorrect answers (with errors).
If it contains both a standard answer and no additional incorrect answers, it is partially correct.
Returns results:
Returns the corresponding score and the judgment result according to the correctness of the answer: full marks for complete correctness, half marks for partial correctness, and 0 marks for incorrect answers or blank answers.
Meaning:
It flexibly handles the complexity of multiple-choice answers and takes into account the scoring logic of completely correct and partially correct to ensure the fairness of the system.
- Insights and Suggestions for Improvement
Takeaway:
The use of subclasses to implement the scoring logic for different question types increases the flexibility and extensibility of the code.
The judgment logic is clear, but the conditions are more nested, resulting in higher code complexity.
Recommendations for improvement:
Optimize input parsing module to reduce regular expression reuse.
Further abstraction of topic classes reduces logical repetition between different question types.
Home Power Circuit Simulation Program
1. System design
This question models the behavior of home circuit devices such as switches, speed controllers, lamps, and fans through class inheritance and polymorphism. Voltage transfer in series circuits is provided bySeriesCircuit
class implementation, the device state is computed by the respective subclasses.
- Core Module Analysis
Device base class (CircuitDevice)
Defines common attributes for all devices, such as pin voltage and device number.
The subcategories are divided into two categories:
Control equipment (ControlDevice
): e.g. switches, governors.
Controlled equipment (ControlledDevice
): e.g. lamps, fans.
control equipmentSwitch
: Realizes state switching and voltage transfer of the switch.SpeedController
: Realization of staged governor logic where the output voltage is a specific proportion of the input voltage.ContinuousController
: Realization of continuous governor logic with the possibility of setting any gear ratio.
controlled deviceIncandescentLamp
: Calculate the brightness based on the voltage difference.Fan
: Calculate the rotational speed based on the voltage difference.
SeriesCircuit
Maintains the connection relationships of devices in a circuit and passes voltages in the order of input.
Implement voltage blocking logic, e.g., when the switch is disconnected, the voltages of subsequent devices are all 0.
- static analysis
Lines of code: about 950.
Annotation coverage: 42%.
Complexity Analysis:
The voltage transfer logic of series circuits is more complex and requires consideration of voltage blocking.
The logic for calculating the state of the device is relatively simple, but the handling of the linear relationship between brightness and speed has duplicate code.
- Core Logic Demonstration
This code implements the voltage transfer logic for series circuits and is the core method of the SeriesCircuit class:
Voltage initialization:
The circuit starts with a VCC voltage of 220V.
The voltageBlocked flag determines if a device (such as a switch) is blocking the voltage transfer.
Voltage transfer:
Iterate through the list of connections and calculate the output voltage based on the device type and state.
If it is a control device (e.g. switch, governor), call its getOutputVoltage method to get the output voltage.
If it is a switch and is in the disconnected state, it blocks the voltage transfer to the subsequent equipment.
Device status updates:
Controlled devices (e.g. lamps, fans) receive voltage and calculate their state (brightness or speed).
If the voltage is blocked or the device is not energized, its state is set to the initial value (e.g., brightness is 0, speed is 0).
Meaning:
The logic of voltage transfer and device states in real circuits is simulated, reflecting the characteristics of series circuits.
The blocking mechanism of the switches accurately reflects the dependencies between the devices and lays the foundation for subsequent expansion of the parallel circuit.
5. Insights and suggestions for improvement
Takeaway:
Flexible simulation of circuit devices is achieved through class inheritance and polymorphism.
The logic of series circuits is clearer, but the state dependence between devices is high, which can easily lead to coupling problems.
Recommendations for improvement:
Optimize the calculation logic of the device state to avoid mutual interference between voltage transfer and device state update.
Introducing a more abstract circuit modeling class to reduce the dependence on the series circuit class.
Pit Mining Experience
In the process of completing Question Sets 4, 5 and 6, we encountered many detailed problems in development and testing, which exposed our deficiencies in logical design, code implementation and exception handling, and also made us deeply appreciate the importance of code optimization and architectural adjustment. In Topic Set 4, format checking is one of the biggest challenges, especially the regular matching of the test paper and answer information. Initially, the design ignored the cases of redundant spaces and format misalignment, which resulted in some error messages not being captured. The fault tolerance of the program was later improved by optimizing the regular expressions and adding manual checking rules. In addition, the handling of deleted questions and citation errors was once confusing during the scoring process. Due to the failure to correctly distinguish whether a topic is deleted or not, the initial implementation directly scored deleted topics, resulting in frequent logic loopholes. We solved this problem by introducing a deletion flag bit and adding a status check in the scoring logic.
In the development of Topic Set 5, the voltage transfer logic for series circuits became the biggest difficulty. Especially when dealing with switching devices, the state transfer after the voltage was blocked was not considered in time, which led to errors in the calculation of subsequent devices. For this reason, we introduced in the circuit modelvoltageBlocked
flags to mark whether a voltage is interrupted or not, ensuring that the logic correctly covers all possible state changes. In addition, the updating of the device state depends on the circuit connection relationship and voltage passing, which is too coupled in the initial implementation, making debugging and modification very difficult. By separating state updating and voltage passing, we have gradually optimized the state computation logic for circuit devices, making the program clearer and easier to maintain.
By Topic Set 6, the logic complexity increased further, with the introduction of parallel circuits and the need for resistance calculations placing higher demands on the development. Initially, we did not handle the calculation of branch currents well when implementing parallel circuits, resulting in an inconsistency between the total current and the branch currents. In addition, due to the omission of resistance attributes for some devices, unrealistic results appeared in the current calculation. In further adjustments, we have added the resistor attributes to the devices by adding theresistance
properties and introduced Ohm's law for current calculation, which eventually solved the problem. Meanwhile, the logic of the parallel circuit needs to deal with input voltage consistency and current distribution, and the initial implementation did not impose strict constraints on the order of voltage transfer, which led to abnormal test results. By optimizing the logic flow, clarifying the priority of voltage transfer, and verifying the integrity of the circuit, we improved the correctness of the parallel circuit logic.
The process of solving these problems made us realize that format validation and logic optimization are especially important in complex systems, and at the same time, good code architecture and detailed comments can significantly improve the maintainability and scalability of the program. In topic set 4, the high coupling between the scoring logic and the data processing caused a lot of problems, and we tried to decouple the two and improve the module design step by step. In topic sets 5 and 6, the logic and state calculation of circuit devices are gradually separated, and the device functions are abstracted. These improvements laid a solid foundation for our subsequent development of complex projects and made us realize the importance of object-oriented design and unit testing.
Suggestions for improvement
Through the gradual deepening of Topic Sets 4, 5 and 6, we have accumulated rich experience in code design and debugging, but also exposed many deficiencies, especially in module decoupling, error handling and code annotation. In the future, we need to further optimize the decoupling of scoring logic and data processing. In the topic set, data parsing, error alerts, and scoring processes are often intertwined, resulting in increased logic complexity and difficult code maintenance. If we can unify the management of question types, question states and scoring rules through policy patterns or factory patterns, it will significantly improve the scalability and flexibility of the code. In addition, we can try to configure the error message and transfer the hardcoding to an external resource file, so that the message can be dynamically adjusted according to different needs and the adaptability of the code can be improved. In circuit simulation, the computational logic of parallel and series circuits can be further abstracted, and different types of circuits can be managed through a unified circuit model interface to reduce duplicate code.
On the other hand, the proportion of comments in the code is still insufficient, especially at complex logic and conditional judgment, which lacks sufficient explanation, leading to easy omission of key logic during debugging. We suggest adding detailed annotations to key modules such as judgment logic and voltage transfer logic, explaining the role of conditional branches and expected inputs and outputs. In addition, complex methods can be further split into small auxiliary methods to reduce the complexity of a single method and improve the readability and testability of the code.
summarize
The completion of these three assignments gave us a deeper understanding of object-oriented programming, data structures and code optimization. From data parsing and judgment logic in topic 4, to circuit device simulation in topic set 5, to parallel circuit and resistance calculation in topic set 6, we gradually mastered how to cope with programming design in complex demand scenarios. Although we encountered a lot of difficulties during the development process, through continuous debugging and optimization, we gradually learned how to build a robust and scalable code architecture. These practical experiences will provide valuable guidance for our subsequent development, enabling us to tackle more challenging tasks with ease.